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Yyyyyy x. yyyyyy

0000 xxxxxx xxxx , xxxx , xxxxx 00000

Phone: (xxx-xxx-xxxx |  abc@xyz.com

 

Dedicated Process Engineer (CVD/PVD/CMP) with 10 years of experience with semiconductors eager to contribute talents toward supporting a progressive company in optimizing bottom-line performance.

 

Profile

 

Proven strengths in project management, process transfer, automated process control, design of experiments, statistical process control and using JMP software to perform complex statistical analysis. Strong personnel management experience including training, mentoring, performance evaluations and conflict resolution.  Highly experienced in coordinating complete patent application/development process. Excellent communication, prioritization, interpersonal, troubleshooting, and customer service expertise. Able to cultivate and maintain a cooperative climate across multiple departments, vital to driving business efficiency.

 

Key Achievements:

 

         Qualified a new pad conditioner and conditioning recipe which decreased planned downtime by 45%, pad usage by 55%, conditioner costs by 45%, and slurry use by 12%; generated savings of $650K+ per year while also enabling two of 17 oxide CMP tools to be idled.

         Improved wafer uniformity to decrease CMP LY loss from 2.2 wafers within 10K activities to under 0.6 wafers within 10K activities.

         Successfully led Westech SPC team to capture 1st place for 2009 corporate SPC Audit.

  • Created and patented solution for target alignment on Endura toolset to eliminate average of 30 wafers of scrap per week.
  • Championed solution to reduce roughness of Aluminum stack (CoTi/Aluminum/TiW) and improve sensitivity of inline defect metrology which enabled task forces to identify and eliminate killer defects.
  • Steered Endura SPC team to a 1st place finish in 2008 corporate SPC Audit.
  • Innovatively co-developed and patented transparent Amorphous Carbon hardmask to enable photo to pattern 90nm features using 248 nm photo technology resulting in significant savings from not having to purchase 193 nm photo equipment for 200 mm tools.
  • Identified $20K+ in monthly savings for Motorola SPS by researching and implementing methods of increasing capacity and reducing consumables.

 

Professional Experience

 

Cypress Semiconductor, Fab 4,  Bloomington, Minnesota                                                      2005 to Present

CMP Senior Staff Engineer / Supervisor      (2008 to Present)

         Resourcefully developed new method to increase accuracy of calibrating polish arm and condition arm position and result in fleet of 17 tools being matched for all 11 defined output parameters.

         Leveraged onboard Nova metrology to implement CMP Automation and APC software.

         Apply sharp leadership talents toward directing, mentoring and supervising five process technicians.

         Maintain oxide CMP area comprised of 17 Westech Avanti 472 tools and corresponding Novas.

           

PVD Senior Staff Engineer / Supervisor       (2005 to 2008)

  • Mentored, trained, directed and supervised six process technicians, consistently emphasizing quality control, accountability and productivity.
  • Adeptly sustained PVD area involving 12 Endura mainframes and 10 chamber configurations.

           

Continued

 

 

Yyyyyy x. yyyyyy ~ Page 2 of 2

 

Professional Experience continued

 

Micron Technology, Advanced Process Research and Development, Boise, Idaho                       2002 to 2005

PVD / CVD Lead Engineer      (2004 to 2005)

  • Directed, motivated and supervised team of nine by delegating tasks and activities, establishing and communicating goals, interviewing and training personnel, conducting performance evaluations, and enforcing company policies and procedures.
  • Exercised strong problem solving abilities to serve as chief point of contact for PVD or CVD concerns or issues.

 

CVD Process / Transfer Coordinator       (2002 to 2004)

  • Spearheaded seamless transfer of Micron s 90nm process flow from R&D fab to volume production fabs worldwide.
  • Dependably analyzed and swiftly resolved all issues associated with CVD pilot line processes or tools including recipe requests, defect analysis and reductions, and excessive tool downtime reports.

 

Motorola SPS, Mesa, Arizona                                                                                                    2000 to 2002

Diffusion / CVD / Clean Process Engineer

  • Employed sound analytical abilities to assess and resolve Novellus tool issues with field support personnel, ultimately elevating uptime by over 5%.
  • Proactively explored, defined and executed strategies to optimize Cpk.

 

Education

 

B.S.E., Chemical Engineering, University of Iowa, Iowa City, Iowa, 2000 

 

Technical Expertise & Processes

 

Amorphous Carbon Hardmask (Producer)

SA BPSG, High Dep Rate PSG (Producer, Centura)

LSO, HDP, PE TEOS, and SA TEOS (HARP) Oxides

Dielectric Anti-Reflective Coating (Producer, P5000)

Barrier Low K Dielectrics (Producer, P5000)

CVD, IMP, ESC, SFD TiN (Unity, Centura, Endura)

CVD, IMP, CoTi, Dura Ti (Centura, Endura)

Aluminum (Endura)

Tungsten (Centura, Endura)

Spin-on Dielectrics (TEL ACT-8)

Selective EPI (Centura)

PE Nitride (Centura, Speed)

Amorphous Silicon (Producer)

Oxide/Nitride CMP (Avanti 472)

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